Single-bit error-correction circuit for ATM interfaces

Cell switching systems use cyclic codes for protecting cell headers from transmission errors either by detecting multiple errors or by correcting single-bit errors. The authors present a new method for implementing single-bit forward error-correction functions by minimising the complexity of parallel CRC circuits, resulting in low hardware complexity and high operational speed. The method does not use a look-up table for determining the corrupted bit position, but implements a repetitive algorithm for matching the generated syndrome. The implementation of the proposed method to an ATM interface using field programmable gate arrays is also described