DocumentCode
776679
Title
Energy and peak-current per-cycle estimation at RTL
Author
Gupta, Subodh ; Najm, Farid N.
Author_Institution
Cadence Design Syst. Inc., San Jose, CA, USA
Volume
11
Issue
4
fYear
2003
Firstpage
525
Lastpage
537
Abstract
We present novel macromodeling techniques for estimating the energy dissipated and peak-current drawn in a logic circuit for every input vector pair (we call this the energy-per-cycle and peak-current-per-cycle, respectively). The macromodels are based on classifying the input vector pairs on the basis of their Hamming distances and using a different equation-based macromodel for every Hamming distance. The variables of our macromodel are the zero-delay transition counts at three logic levels inside the circuit. We present an automatic characterization process by which such macromodels can be constructed. The energy-per-cycle macromodel provides a transient energy waveform, and can also be used to estimate the moving average energy over any time window, whereas peak-current-per-cycle macromodel provides peak-current which can be used for studying IR drop problems. Some key features of this technique are: 1) the models are compact (linear in the number of inputs); 2) they can be used for any input sequence; and 3) the characterization is automatic and requires no user intervention. These approaches have been implemented and models have been built and tested for many circuits. The average errors observed in estimating the energy-per-cycle and peak-current-per-cycle are under 20%. The energy-per-cycle model can also be used to measure the long-term average power, with an observed error of under 10% on average.
Keywords
VLSI; high level synthesis; integrated circuit design; low-power electronics; transient analysis; Hamming distances; RTL; automatic characterization process; energy-per-cycle; equation-based macromodel; input sequence; input vector pair; logic circuit; macromodeling techniques; moving average energy; peak-current per-cycle estimation; time window; transient energy waveform; zero-delay transition counts; Circuit testing; Costs; Design automation; Differential equations; Energy consumption; Logic circuits; Logic design; Power dissipation; Process design; Very large scale integration;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2002.800534
Filename
1229862
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