DocumentCode :
776717
Title :
Digital Phase-Locked Loop Behavior with Clock and Sampler Quantization
Author :
Pomalaza-Raez, Carlos A. ; McGillem, Clare D.
Author_Institution :
Dept. of Electr. Eng., Clarkson Univ., Potsdam, NY, USA
Volume :
33
Issue :
8
fYear :
1985
fDate :
8/1/1985 12:00:00 AM
Firstpage :
753
Lastpage :
759
Abstract :
This paper deals with the analysis of digital phase-locked loop (DPLL) models that take into account the discrete nature of the analog-to-digital converter (ADC) and the numerical controlled oscillator (NCO). The models are general enough to allow for different kinds of noise distributions and nonuniform qnantization. Weak assumptions on the nature of the loop parameters reduce the models to finite Markov chain problems. It is shown that the resulting probability transition matrices are "lumpable," which translates into convenient Computational savings. In this manner, an exact statistical analysis is possible not only for first-order but also for second-order loops. Numerical results give evidence that for appropriate ADC and NCO characteristics, few quantization levels are needed to match the performance of models that ignore qnantization. However, when the values of these characteristics are not proper, a substantial change in performance can occur. This change in the loop behavior cannot be analyzed or predicted by those models that neglect the quantization effects. It is also found that the use of a nonlinear ADC improves the loop behavior when the noise density distribution is heavy-tailed, e.g., atmospheric noise.
Keywords :
PLLs; Phase-locked loop (PLL); Quantization; Analog-digital conversion; Atmospheric modeling; Clocks; Matrix converters; Oscillators; Phase locked loops; Predictive models; Probability; Quantization; Statistical analysis;
fLanguage :
English
Journal_Title :
Communications, IEEE Transactions on
Publisher :
ieee
ISSN :
0090-6778
Type :
jour
DOI :
10.1109/TCOM.1985.1096384
Filename :
1096384
Link To Document :
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