• DocumentCode
    777024
  • Title

    Large-signal subthreshold CMOS transconductance amplifier

  • Author

    Opris, I.E. ; Kovacs, G.T.A.

  • Author_Institution
    Dept. of Electr. Eng., Stanford Univ., CA, USA
  • Volume
    31
  • Issue
    9
  • fYear
    1995
  • fDate
    4/27/1995 12:00:00 AM
  • Firstpage
    718
  • Lastpage
    720
  • Abstract
    A folding architecture for a subthreshold CMOS transconductance amplifier is described. Good linearity is obtained for an extremely large differential input voltage, without loss in the common-mode voltage range. Theoretical noise analysis indicates a 6 dB improvement in the dynamic range compared to a simple single-pair MOS implementation. A prototype has been fabricated in a 2 μm CMOS process, and experimental results are presented
  • Keywords
    CMOS analogue integrated circuits; feedback amplifiers; integrated circuit noise; 2 micron; CMOS transconductance amplifier; common-mode voltage range; folding architecture; large-signal subthreshold amplifier; linearity; noise analysis;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19950504
  • Filename
    384067
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=777024