Title :
An unconditionally stable two-stage CMOS amplifier
Author :
Reay, Richard J. ; Kovacs, Gregory T A
Author_Institution :
Center for Integrated Syst., Stanford Univ., CA, USA
fDate :
5/1/1995 12:00:00 AM
Abstract :
This paper describes a two-stage CMOS amplifier that is stable for any capacitive load. This is achieved through the use of an optimized cascoded compensation topology. A new level shifting technique allows independent optimization of drive capability, noise and systematic offset voltage. The circuit is 0.1 mm2 in a 2 μm technology and has a quiescent current consumption of 110 μA
Keywords :
CMOS analogue integrated circuits; circuit optimisation; circuit stability; compensation; differential amplifiers; equivalent circuits; 110 muA; 2 micron; capacitive load; independent optimization; level shifting technique; optimized cascoded compensation topology; two-stage CMOS amplifier; unconditionally stable amplifier; CMOS technology; Circuit noise; Circuit stability; Circuit topology; Equations; Frequency; Instruments; Noise level; Power amplifiers; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
