• DocumentCode
    777616
  • Title

    Stochastic assembly of sublithographic nanoscale interfaces

  • Author

    DeHon, André ; Lincoln, Patrick ; Savage, John E.

  • Author_Institution
    Dept. of Comput. Sci., California Inst. of Technol., Pasadena, CA, USA
  • Volume
    2
  • Issue
    3
  • fYear
    2003
  • Firstpage
    165
  • Lastpage
    174
  • Abstract
    We describe a technique for addressing individual nanoscale wires with microscale control wires without using lithographic-scale processing to define nanoscale dimensions. Such a scheme is necessary to exploit sublithographic nanoscale storage and computational devices. Our technique uses modulation doping to address individual nanowires and self-assembly to organize them into nanoscale-pitch decoder arrays. We show that if coded nanowires are chosen at random from a sufficiently large population, we can ensure that a large fraction of the selected nanowires have unique addresses. For example, we show that N lines can be uniquely addressed over 99% of the time using no more than 2.2log2(N)+11 address wires. We further show a hybrid decoder scheme that only needs to address N=O(Wlitho-pitch/Wnano-pitch) wires at a time through this stochastic scheme; as a result, the number of unique codes required for the nanowires does not grow with decoder size. We give an O(N2) procedure to discover the addresses which are present. We also demonstrate schemes that tolerate the misalignment of nanowires which can occur during the self-assembly process.
  • Keywords
    arrays; computer bootstrapping; integrated memory circuits; molecular electronics; nanoelectronics; nanowires; programmable circuits; self-assembly; bootstrapping; electronic nanotechnology; hybrid decoder scheme; individual nanoscale wires; microscale control wires; modulation doping; molecular electronics; nanoscale dimensions; nanoscale-pitch decoder arrays; nanowire misalignment tolerance; nanowires; programmable memory; self-assembly; stochastic assembly; stochastic scheme; sublithographic nanoscale interfaces; unique addressing; Assembly; Computer science; Decoding; Epitaxial layers; Nanoscale devices; Nanowires; Programmable logic arrays; Self-assembly; Stochastic processes; Wires;
  • fLanguage
    English
  • Journal_Title
    Nanotechnology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1536-125X
  • Type

    jour

  • DOI
    10.1109/TNANO.2003.816658
  • Filename
    1230118