Hardness assurance and testing techniques for high resolution (12 to 16-bit) analog-to-digital converters

Author

Lee, C.I. ; Rax, B.G. ; Johnston, A.H.

Author_Institution

Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA

Volume

42

Issue

6

fYear

1995

fDate

12/1/1995 12:00:00 AM

Firstpage

1681

Lastpage

1688

Abstract

This paper discusses hardness assurance and testing techniques to test and evaluate total dose radiation degradation of high resolution A/D converters. A 16-bit converter with internal calibration is compared with older designs (12-/14-bit) that use more conventional architectures. The results show that measurements of dc parameters and static linearity at major code transitions should be adequate for hardness assurance testing with considerable cost savings compared to full dynamic or all-codes testing. The failure level of CMOS and BiCMOS converters depends on dose rate in a complicated way that is not adequately addressed by high-temperature annealing. Tests at low dose rates - below 0.01 rad(Si)/s - are recommended for space applications of these technologies

Keywords

BiCMOS integrated circuits; CMOS integrated circuits; analogue-digital conversion; integrated circuit testing; radiation hardening (electronics); 12 to 16 bit; BiCMOS converter; CMOS converter; DC parameters; code transitions; failure; hardness assurance testing; high resolution analog-to-digital converters; internal calibration; radiation degradation; space applications; static linearity; Analog-digital conversion; Annealing; BiCMOS integrated circuits; CMOS technology; Calibration; Costs; Degradation; Linearity; Space technology; Testing;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/23.488766

Filename

488766