Title :
Single event upsets in gallium arsenide pseudo-complementary MESFET logic
Author :
Fouts, D.J. ; Weatherford, T.R. ; McMorrow, D. ; Wolfe, K. ; Van Dyk, S.E. ; Melinger, J.S. ; Tran, L.H. ; Campbell, A.B.
Author_Institution :
Dept. of Electr. & Comput. Eng., Naval Postgraduate Sch., Monterey, CA, USA
fDate :
12/1/1995 12:00:00 AM
Abstract :
An introduction to gallium arsenide (GaAs) Pseudo-Complementary MESFET Logic (PCML) circuits is presented. PCML was developed to reduce the sensitivity of high-speed GaAs logic to radiation-induced single event upsets (SEUs). Experiments for testing the single-event upset (SEU) sensitivity of GaAs PCML integrated circuits (ICs) are described. The results of the experiments are analyzed. This new type of high-speed, low-power, GaAs logic provides decreased sensitivity to SEUs compared to more traditional circuit designs such as Directly-Coupled FET Logic (DCFL). PCML is fully compatible with existing GaAs E/D MESFET fabrication processes, such as those commonly used to make DCFL
Keywords :
III-V semiconductors; MESFET integrated circuits; buffer circuits; field effect logic circuits; gallium arsenide; integrated circuit testing; laser beam effects; logic gates; logic testing; GaAs; GaAs E/D MESFET fabrication compatibility; GaAs pseudo-complementary MESFET logic circuits; OR/NOR gate; SEU sensitivity testing; high-speed low-power GaAs logic; inverter/buffer circuit; laser irradiation; radiation-induced single event upsets; Circuit synthesis; Circuit testing; FETs; Gallium arsenide; Integrated circuit testing; Logic circuits; Logic design; MESFET circuits; Single event transient; Single event upset;
Journal_Title :
Nuclear Science, IEEE Transactions on
