Two-dimensional switched-capacitor decimating filters

Traditional two-dimensional (2-D) switched-capacitor filters require very large line-memories mainly because of the oversampled characteristic of the signal, both at the input and at the output. By bringing the output sampling rate closer to the Nyquist signal bandwidth it is possible to reduce considerably the line-memory requirements, and thus saving silicon area for cheaper integrated circuit implementation. Besides, lower output sampling rates also contribute for ease of signal digitization and processing and economy of signal transmission. Such operation of reducing the sampling rate from the input to the output can be achieved using appropriate 2-D decimating filters which, besides the required baseband filtering, should also provide the necessary antialiasing filtering. This paper describes new switched-capacitor networks and design techniques that can efficiently implement such 2-D decimating filtering functions, both with finite impulse response and infinite impulse response with separable denominator. They are based on extensions of conventional multirate switched-capacitor polyphase networks and offer simple, systematic synthesis procedures which significantly extend the currently available design techniques for 2-D analog filters