Reductions in quality caused by uneven fault coverage of different areas of an integrated circuit

Author

Maxwell, Peter C.

Author_Institution

Design Technol. Center, Hewlett-Packard Co., Palo Alto, CA, USA

Volume

14

Issue

5

fYear

1995

fDate

5/1/1995 12:00:00 AM

Firstpage

603

Lastpage

607

Abstract

This paper addresses problems associated with the production and interpretation of traditional fault coverage numbers. In particular, the issue of nonuniform distribution of detected faults is addressed, It is shown that when any degree of defect clustering occurs in the IC fabrication process, there is a very big difference in final quality between covering the chip evenly all over and leaving parts relatively untested, even if the coverage is the same in both cases. Empirical evidence is given to support the theory

Keywords

fault diagnosis; integrated circuit technology; integrated circuit testing; integrated circuit yield; monolithic integrated circuits; probability; quality control; IC fabrication process; defect clustering; integrated circuit; nonuniform distribution; quality reduction; reject rate; uneven fault coverage; Circuit faults; Delay; Electrical fault detection; Etching; Fabrication; Fault detection; Integrated circuit modeling; Integrated circuit technology; Testing;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/43.384423

Filename

384423