Title :
A deterministic algorithm for automatic CMOS transistor sizing
Author :
Richman, B.A. ; Hansen, James E. ; Cameron, Kelly
Author_Institution :
Gould Inc., Pocatello, ID, USA
fDate :
4/1/1988 12:00:00 AM
Abstract :
A model which offers a closed-form equation for determining device size, based on speed and load, has been developed. The need for circuit simulation is eliminated in most cases. This model is used in a system for automatically producing performance-tuned cell layouts
Keywords :
CMOS integrated circuits; cellular arrays; integrated logic circuits; semiconductor device models; automatic CMOS transistor sizing; closed-form equation; deterministic algorithm; load; model; performance-tuned cell layouts; producing standard cell libraries; speed; tradeoffs; CMOS logic circuits; CMOS technology; Capacitance; Circuit simulation; Clocks; Delay; Equations; Libraries; Logic devices; Routing; Semiconductor device modeling; Standards development;
Journal_Title :
Solid-State Circuits, IEEE Journal of
