Title :
Harmonic distortion caused by capacitors implemented with MOSFET gates
Author :
Behr, Alexandre Ternes ; Schneider, Márcio Cherem ; Filho, Sidnei Noceti ; Montoro, Carlos Galup
Author_Institution :
Lab. de Instrum. Eletron., Univ. Federal de Santa Catarina, Florianopolis, Brazil
fDate :
10/1/1992 12:00:00 AM
Abstract :
The capacitive gate structures available in digital-oriented CMOS processes are reviewed, with emphasis on their use as linear capacitors. It is shown that the voltage harmonic distortion in MOS gate capacitors biased in either accumulation or strong inversion is almost technology independent. Experimental and analytical results indicate that the total harmonic distortion in an adequately biased (2.5 V) gate capacitor can be kept low (THD <-40 dB for a 3-V voltage swing)
Keywords :
CMOS integrated circuits; capacitors; electric distortion; metal-insulator-semiconductor devices; semiconductor device models; MOS gate capacitors; MOSFET gates; THD; accumulation; capacitive gate structures; digital-oriented CMOS processes; linear capacitors; strong inversion; total harmonic distortion; voltage harmonic distortion; CMOS process; CMOS technology; Capacitance; Digital systems; Filters; Harmonic distortion; MOS capacitors; MOSFET circuits; Very large scale integration; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
