`Overturned-stairs´ adder trees and multiplier design

Wallace trees are the theoretically fastest multioperand adders. However, their complex interconnections do not permit practical implementations. A family of Overturned-Stairs trees which achieve the same speed performance as equivalent Wallace trees in many cases, but require a simple and regular interconnection scheme is introduced. These trees can be designed in a systematic way and laid out regularly in a VLSI circuit. A comparison is made between various trees to provide useful indexes for a practical design. The design of a 16×16 2´s complement parallel multiplier using Overturned-Stairs trees is studied as an illustration