Title :
Modified reduced adder graph algorithm for multiplierless FIR filters
Author :
Xu, F. ; Chang, C.-H. ; Jong, C.-C.
Author_Institution :
Centre for High Performance Embedded Syst., Nanyang Technol. Univ., Singapore
fDate :
3/17/2005 12:00:00 AM
Abstract :
A modified reduced adder graph (MRAG) algorithm and its hybrid version are proposed for efficient digital filter implementation. Several improvements are made to exploit fully the efficient optimal part of the n-dimensional reduced adder graph (RAG-n) algorithm. Simulation results demonstrate that MRAG is capable of generating lower adder cost solutions.
Keywords :
FIR filters; adders; computational complexity; graph theory; digital filter implementation; logic complexity; modified reduced adder graph algorithm; multiplierless FIR filters; n-dimensional reduced adder graph;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20057392