Title :
An SEU analysis approach for error propagation in digital VLSI CMOS ASICs
Author :
Baze, M.P. ; Buchner, S. ; Bartholet, W.G. ; Dao, T.A.
Author_Institution :
Defence & Space Group, Boeing Aerosp., Seattle, WA, USA
fDate :
12/1/1995 12:00:00 AM
Abstract :
A probabilistic description of error propagation in complex circuits is formulated and solved as a set of linear equations. Comparisons are made with experimental data
Keywords :
CMOS digital integrated circuits; VLSI; application specific integrated circuits; errors; SEU analysis; complex circuits; digital VLSI CMOS ASICs; error propagation; linear equations; probabilistic theory; Application specific integrated circuits; Circuit simulation; Computer errors; Discrete event simulation; Equations; Error analysis; Fabrication; Logic circuits; Registers; Very large scale integration;
Journal_Title :
Nuclear Science, IEEE Transactions on
