Title :
Partially Depleted SONOS FinFET for Unified RAM (URAM)—Unified Function for High-Speed 1T DRAM and Nonvolatile Memory
Author :
Han, Jin-Woo ; Ryu, Seong-Wan ; Kim, Chung-Jin ; Kim, Sungho ; Im, Maesoon ; Choi, Sung Jin ; Kim, Jin Soo ; Kim, Kwang Hee ; Lee, Gi Sung ; Oh, Jae Sub ; Song, Myeong Ho ; Park, Yun Chang ; Kim, Jeoung Woo ; Choi, Yang-Kyu
Author_Institution :
Sch. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Daejeon
fDate :
7/1/2008 12:00:00 AM
Abstract :
Unified random access memory (URAM) is demonstrated for the first time. The novel partially depleted (PD) SONOS FinFET provides unified function of a high-speed capacitorless 1T DRAM and a nonvolatile memory (NVM). The combination of an oxide/nitride/oxide (O/N/O) layer and a floating-body facilitates URAM operation in PD SONOS FinFETs. An NVM function is achieved by FN tunneling into the O/N/O stack and, a 1T-DRAM function is achieved by excessive-hole accumulation in the PD body. The fabricated PD SONOS FinFET shows retention time exceeding 10 years for NVM operation and program/erase time below 6 ns for 1T-DRAM in a single-cell transistor. These two memory functions are guaranteed without disturbance between them.
Keywords :
DRAM chips; field effect memory circuits; field effect transistors; FN tunneling; NVM function; excessive-hole accumulation; floating-body facilitates URAM operation; high-speed capacitorless DRAM; magnetic flux density 1 T; nonvolatile memory; oxide-nitride-oxide layer; partially-depleted SONOS FinFET; program-erase time; single-cell transistor; unified random access memory; Embedded system; FinFETs; Integrated circuit yield; Nonvolatile memory; Random access memory; Read-write memory; SONOS devices; Silicon on insulator technology; System-on-a-chip; Tunneling; 1T DRAM; Capacitorless DRAM; FinFET; SONOS; nonvolatile memory (NVM); unified RAM (URAM);
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2008.2000616