• DocumentCode
    78127
  • Title

    An 8-Channel Scalable EEG Acquisition SoC With Patient-Specific Seizure Classification and Recording Processor

  • Author

    Yoo, Jerald ; Long Yan ; El-Damak, D. ; Altaf, M.A.B. ; Shoeb, A.H. ; Chandrakasan, Anantha P.

  • Author_Institution
    Microsyst. Eng., Masdar Inst. of Sci. & Technol., Abu Dhabi, United Arab Emirates
  • Volume
    48
  • Issue
    1
  • fYear
    2013
  • fDate
    Jan. 2013
  • Firstpage
    214
  • Lastpage
    228
  • Abstract
    An 8-channel scalable EEG acquisition SoC is presented to continuously detect and record patient-specific seizure onset activities from scalp EEG. The SoC integrates 8 high-dynamic range Analog Front-End (AFE) channels, a machine-learning seizure classification processor and a 64 KB SRAM. The classification processor exploits the Distributed Quad-LUT filter architecture to minimize the area while also minimizing the overhead in power × delay . The AFE employs a Chopper-Stabilized Capacitive Coupled Instrumentation Amplifier to show NEF of 5.1 and noise RTI of 0.91 μVrms for 0.5-100 Hz bandwidth. The classification processor adopts a support-vector machine as a classifier, with a GBW controller that gives real-time gain and bandwidth feedback to AFE to maintain accuracy. The SoC is verified with the Children´s Hospital Boston-MIT EEG database as well as with rapid eye blink pattern detection test. The SoC is implemented in 0.18 μm 1P6M CMOS process occupying 25 mm2, and it shows an accuracy of 84.4% in eye blink classification test, at 2.03 μJ/classification energy efficiency. The 64 KB on chip memory can store up to 120 seconds of raw EEG data.
  • Keywords
    SRAM chips; biomedical electronics; electroencephalography; instrumentation amplifiers; learning (artificial intelligence); medical computing; support vector machines; system-on-chip; table lookup; 1P6M CMOS process; 8-channel scalable EEG acquisition SoC; Children Hospital Boston-MIT EEG database; GBW controller; SRAM; bandwidth 0.5 Hz to 100 Hz; bandwidth feedback; chip memory; chopper-stabilized capacitive coupled instrumentation amplifier; classification energy efficiency; distributed quad-LUT filter architecture; eye blink classification test; high-dynamic range AFE channels; high-dynamic range analog front-end channels; machine-learning seizure classification processor; patient-specific seizure classification; rapid eye blink pattern detection test; real-time gain; recording processor; scalp EEG; size 0.18 mum; support vector machine; Accuracy; Electroencephalography; Engines; Feature extraction; Monitoring; System-on-a-chip; Vectors; Continuous health monitoring; System-on-Chip (SoC); distributed quad-LUT (DQ-LUT); electroencephalogram (EEG); epilepsy; machine learning; seizure; support vector machine (SVM);
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2012.2221220
  • Filename
    6363489