Programmable built-in self-testing of embedded RAM clusters in system-on-chip architectures

Author

Benso, Alfredo ; Di Carlo, Stefano ; Di Natale, Giorgio ; Prinetto, Paolo ; Bodoni, Monica Lobetti

Author_Institution

Politecnico di Torino, Italy

Volume

41

Issue

9

fYear

2003

Firstpage

90

Lastpage

97

Abstract

Multiport memories are widely used as embedded cores in all communication system-on-chip devices. Due to their high complexity and very low accessibility, built-in self-test (BIST) is the most common solution implemented to test the different memories embedded in the system. This article presents a programmable BIST architecture based on a single microprogrammable BIST processor and a set of memory wrappers designed to simplify the test of a system containing a large number of distributed multiport memories of different sizes (number of bits, number of words), access protocols (asynchronous, synchronous), and timing.

Keywords

built-in self test; multiport networks; random-access storage; system-on-chip; BIST; access protocols; accessibility; embedded RAM clusters; memory wrappers; multiport memories; programmable built-in self-testing; system-on-chip architectures; Access protocols; Application specific integrated circuits; Automatic testing; Built-in self-test; Mobile communication; Random access memory; Read-write memory; System testing; System-on-a-chip; Timing;

fLanguage

English

Journal_Title

Communications Magazine, IEEE

Publisher

ieee

ISSN

0163-6804

Type

jour

DOI

10.1109/MCOM.2003.1232242

Filename

1232242