Title :
Multiple Reference Frame-Based Control of Three-Phase PWM Boost Rectifiers under Unbalanced and Distorted Input Conditions
Author :
Xiao, Peng ; Corzine, Keith A. ; Venayagamoorthy, Ganesh Kumar
Author_Institution :
Thermadyne, Lebanon, NH
fDate :
7/1/2008 12:00:00 AM
Abstract :
Many control algorithms and circuits for three-phase pulse width modulation active rectifiers have been proposed in the past decades. In most of the research, it is often assumed that the input voltages are balanced or contain only fundamental frequency components. In this paper, a selective harmonic compensation method is proposed based on an improved multiple reference frame algorithm, which decouples signals of different frequencies before reference frame transformation. This technique eliminates interactions between the fundamental-frequency positive-sequence components and harmonic and/or negative-sequence components in the input currents, so that fast and accurate regulation of harmonic and unbalanced currents can be achieved. A decoupled phase-locked loop algorithm is used for proper synchronization with the utility voltage, which also benefits from the multiple reference frame technique. The proposed control method leads to considerable reduction in low-order harmonic contents in the rectifier input current and achieves almost zero steady-state error through feedback loops. Extensive experimental tests based on a fixed-point digital signal processor controlled 2 kW prototype are used to verify the effectiveness of the proposed ideas.
Keywords :
PWM power convertors; PWM rectifiers; phase locked loops; decoupled phase-locked loop algorithm; multiple reference frame-based control; selective harmonic compensation method; three-phase PWM boost rectifiers; Error correction; Frequency synchronization; Phase locked loops; Pulse circuits; Pulse width modulation; Rectifiers; Signal processing algorithms; Space vector pulse width modulation; Steady-state; Voltage; Active rectifier; harmonic compensation; multiple reference frame; phase-locked loop;
Journal_Title :
Power Electronics, IEEE Transactions on
DOI :
10.1109/TPEL.2008.925205