DocumentCode :
782078
Title :
Delay defect characteristics and testing strategies
Author :
Kim, Kee Sup ; Mitra, Subhasish ; Ryan, Paul G.
Volume :
20
Issue :
5
fYear :
2003
Firstpage :
8
Lastpage :
16
Abstract :
Several factors influence production delay testing and corresponding DFT techniques: defect sources, design styles. ability to monitor process characteristics, test generation time. available test time, and tester memory. We present an overview of delay defect characteristics and the impact of delay defects on IC quality. We also discuss practical delay-testing strategy in terms of test pattern generation, test application speed, DFT, and test cost.
Keywords :
design for testability; integrated logic circuits; logic testing; DFT techniques; IC quality; defect sources; delay defect characteristics; delay-testing; design styles; process characteristics; production delay testing; test generation time; Delay systems; Frequency; Gaussian distribution; Manufacturing processes; Microprocessors; Power generation economics; Probability distribution; Process control; Silicon; Testing;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.2003.1232251
Filename :
1232251
Link To Document :
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