Bootstrapped full-swing BiCMOS/BiNMOS logic circuits for 1.2-3.3 V supply voltage regime

Author

Bellaouar, Abdellatif ; Elmasry, Mohamed I. ; Embabi, Sherif H K

Author_Institution

VLSI Res. Group, Waterloo Univ., Ont., Canada

Volume

30

Issue

6

fYear

1995

fDate

6/1/1995 12:00:00 AM

Firstpage

629

Lastpage

636

Abstract

Novel full-swing BiCMOS/BiNMOS logic circuits using bootstrapping in the pull-up section for low supply voltage down to 1 V are reported. These circuit configurations use noncomplementary BiCMOS technology. Simulations have shown that they outperform other BiCMOS circuits at low supply voltage using 0.35 μm BiCMOS process. The delay and power dissipation of several NAND configurations have been compared. The new circuits offer delay reduction between 40 and 66% over CMOS in the range 1.2-3.3 V supply voltage. The minimum fanout at which the new circuits outperform CMOS gate is 5, which is lower than that of other gates particularly for sub-2.5 V operation

Keywords

BiCMOS digital integrated circuits; BiCMOS logic circuits; NAND circuits; bootstrap circuits; combinational circuits; delays; logic gates; 0.35 micron; 1.2 to 3.3 V; BiCMOS/BiNMOS logic circuits; NAND configurations; bootstrapped full-swing logic circuits; circuit configurations; delay; delay reduction; minimum fanout; noncomplementary BiCMOS technology; power dissipation; pull-up section; supply voltage regime; BiCMOS integrated circuits; Bipolar transistors; CMOS technology; Degradation; Delay; Integrated circuit technology; Logic circuits; Low voltage; Portable computers; Power supplies;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.387065

Filename

387065