• DocumentCode
    785862
  • Title

    Mixed block placement via fractional cut recursive bisection

  • Author

    Agnihotri, Ameya Ramesh ; Ono, Satoshi ; Li, Chen ; Yildiz, Mehmet Can ; Khatkhate, Ateen ; Koh, Cheng-Kok ; Madden, Patrick H.

  • Author_Institution
    Comput. Sci. Dept., State Univ. of New York, Binghamton, NY, USA
  • Volume
    24
  • Issue
    5
  • fYear
    2005
  • fDate
    5/1/2005 12:00:00 AM
  • Firstpage
    748
  • Lastpage
    761
  • Abstract
    Recursive bisection is a popular approach for large scale circuit placement problems, combining a high degree of scalability with good results. In this paper, we present a bisection-based approach for both standard cell and mixed block placement; in contrast to prior work, our horizontal cut lines are not restricted to row boundaries. This technique, which we refer to as a fractional cut, simplifies mixed block placement and also avoids a narrow region problem encountered in standard cell placement. Our implementation of these techniques in the placement tool Feng Shui 2.6 retains the speed and simplicity for which bisection is known, while making it competitive with leading methods on standard cell designs. On mixed block placement problems, we obtain substantial improvements over recently published work. Half perimeter wire lengths are reduced by 29% on average, compared to a flow based on Capo and Parquet; compared to mPG-ms, wire lengths are reduced by 26% on average.
  • Keywords
    circuit layout CAD; circuit optimisation; integrated circuit layout; Feng Shui 2.6 placement tool; design automation; fractional cut recursive bisection; half perimeter wirelength; large scale circuit placement; mixed block placement; mixed size placement; placement legalization; standard cell design; standard cell placement; wirelength reduction; Algorithm design and analysis; Circuits; Computer science; Design automation; Explosions; Fabrication; Large-scale systems; Logic gates; Scalability; Wire; Circuit placement; design automation; mixed size placement; placement legalization; recursive bisection;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2005.846363
  • Filename
    1424177