A new realization for multiprocessor implementation of 2-D denominator-separable digital filters for real-time processing

Author

Raghuramireddy, D. ; Unbehauen, R.

Author_Institution

Lehrstuhl fuer Allgemeine & Theor. Elektrotech., Erlangen, Germany

Volume

40

Issue

9

fYear

1992

fDate

9/1/1992 12:00:00 AM

Firstpage

2349

Lastpage

2353

Abstract

An efficient multiprocessor implementation of 2D denominator-separable digital filters for real-time processing is presented. The realization is derived by minimizing the throughput delay and maximizing the parallelism using the basic primitive structure of M.Y. Dabbagh and W.E. Alexander (see ibid. vol.37, no.6, p.872-81, 1989). The proposed realization is as good and efficient as their realizations for the implementation of symmetric fan filters. It is shown that in special cases the proposed realization may be more efficient

Keywords

multiprocessing systems; two-dimensional digital filters; 2D denominator-separable digital filters; basic primitive structure; multiprocessor implementation; parallelism maximisation; real-time processing; throughput delay minimisation; Delay; Digital filters; Discrete transforms; Distributed computing; Optimized production technology; Signal analysis; Signal processing; Signal processing algorithms; Throughput; Time frequency analysis;

fLanguage

English

Journal_Title

Signal Processing, IEEE Transactions on

Publisher

ieee

ISSN

1053-587X

Type

jour

DOI

10.1109/78.157275

Filename

157275