DocumentCode :
787064
Title :
Synthesis of application specific instruction sets
Author :
Huang, Jer ; Despain, Alvin M.
Author_Institution :
Inst. of Comput. & Inf. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
Volume :
14
Issue :
6
fYear :
1995
fDate :
6/1/1995 12:00:00 AM
Firstpage :
663
Lastpage :
675
Abstract :
In instruction set serves as the interface between hardware and software in a computer system. In an application specific environment, the system performance can be improved by designing an instruction set that matches the characteristics of hardware and the application. We present a systematic approach to generate application-specific instruction sets so that software applications can be efficiently mapped to a given pipelined micro-architecture. The approach synthesizes instruction sets from application benchmarks, given a machine model, an objective function, and a set of design constraints. In addition, assembly code is generated to show how the benchmarks can be compiled with the synthesized instruction set. The problem of designing instruction sets is formulated as a modified scheduling problem. A binary tuple is proposed to model the semantics of instructions and integrate the instruction formation process into the scheduling process. A simulated annealing scheme is used to solve for the schedules. Experiments have shown that the approach is capable of synthesizing powerful instructions for modern pipelined microprocessors, and running with reasonable time and a modest amount of memory for large applications
Keywords :
computer architecture; instruction sets; logic CAD; pipeline processing; scheduling; simulated annealing; application benchmarks; application specific instruction sets; assembly code; binary tuple; design constraints; instruction sets synthesis; machine model; modified scheduling problem; objective function; pipelined microarchitecture; pipelined microprocessors; semantics modelling; simulated annealing scheme; synthesized instruction set; Application software; Assembly; Computer aided instruction; Computer interfaces; Hardware; Instruction sets; Microprocessors; Processor scheduling; Simulated annealing; System performance;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.387728
Filename :
387728
Link To Document :
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