DocumentCode :
787519
Title :
SWICH: A Prototype for Efficient Cache-Level Checkpointing and Rollback
Author :
Teodorescu, Radu ; Nakano, Jun ; Torrellas, Josep
Author_Institution :
Dept. of Comput. Sci., Illinois Univ., Urbana, IL
Volume :
26
Issue :
5
fYear :
2006
Firstpage :
28
Lastpage :
40
Abstract :
Existing cache-level checkpointing schemes do not continuously support a large rollback window. Immediately after a checkpoint, the number of instructions that the processor can undo falls to zero. To address this problem, we introduce Swich, an FPGA-based prototype of a new cache-level scheme that keeps two live checkpoints at all times, forming a sliding rollback window that maintains a large minimum and average length
Keywords :
cache storage; checkpointing; computer architecture; field programmable gate arrays; shared memory systems; Swich FPGA-based prototype; cache-level checkpointing schemes; processor microarchitecture; sliding rollback window; Bit error rate; Cache memory; Checkpointing; Fault detection; Field programmable gate arrays; Hardware; Microarchitecture; Prototypes; Registers; Taxonomy; hardware prototype; low-overhead checkpointing; transient faults;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/MM.2006.100
Filename :
1709820
Link To Document :
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