Title :
Advanced SPICE modelling of SiGe HBTs using VBIC model
Author :
Senapati, B. ; Maiti, C.K.
Author_Institution :
Dept. of Electron. & Electr. Commun. Eng., Indian Inst. of Technol., Kharagpur, India
fDate :
4/1/2002 12:00:00 AM
Abstract :
The vertical bipolar intercompany (VBIC) model has been applied to silicon-germanium heterojunction bipolar transistors (SiGe HBTs). The model includes the improved Early effect, quasi-saturation, substrate parasitic, avalanche multiplication, and self-heating. Several device parameters have been extracted from SiGe HBTs and implemented in the VBIC model. A comparison is made with the SPICE Gummel-Poon model. The usefulness and accuracy of the VBIC model for SiGe HBTs are demonstrated by way of comparison of simulated and measured room temperature device data
Keywords :
Ge-Si alloys; SPICE; avalanche breakdown; equivalent circuits; heterojunction bipolar transistors; semiconductor device breakdown; semiconductor device models; thermal resistance; Gummel-Poon model; SiGe; advanced SPICE modelling; avalanche multiplication; heterojunction bipolar transistors; improved Early effect; intrinsic transistor; parasitic substrate transistor; quasi-saturation; self-heating; substrate parasitic; vertical bipolar intercompany model;
Journal_Title :
Circuits, Devices and Systems, IEE Proceedings -
DOI :
10.1049/ip-cds:20020352
