DocumentCode :
79135
Title :
Method to Design General RNS Reverse Converters for Extended Moduli Sets
Author :
Pettenghi, Hector ; Chaves, Ricardo ; Sousa, Leonel
Author_Institution :
Inst. de Eng. de Sist. e Comput. - Investig. e Desenvolvimento, Lisbon, Portugal
Volume :
60
Issue :
12
fYear :
2013
fDate :
Dec. 2013
Firstpage :
877
Lastpage :
881
Abstract :
In recent years, research on residue number systems (RNS) has targeted larger dynamic ranges (DRs) in order to further explore their inherent parallelism. In this brief, we start from the traditional three-moduli set {2n, 2n - 1, 2n + 1}, with an equivalent 3 n-bit DR; propose horizontal and vertical extensions to scale the DR; and improve the parallelism according to the requirements. This brief also introduces a method to design general reverse converters for extended moduli sets with the desired DRs, whereas the existing state of the art allows to achieve at most (8n + 1) bit. The experimental results suggest that the proposed moduli set extensions allow for larger and more balanced moduli sets, in comparison with the state of the art, resulting in an improvement of the overall RNS performance at the cost of a slower reverse conversion operation.
Keywords :
adders; logic design; residue number systems; DR; RNS-to-binary converters; adder-based processors; dynamic range; extended moduli sets; general RNS reverse converters; moduli set extensions; residue number systems; reverse conversion operation; Converters; Dynamic range; Parallel processing; Proposals; Adder-based processors; RNS-to-binary converters; residue number systems (RNSs);
fLanguage :
English
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-7747
Type :
jour
DOI :
10.1109/TCSII.2013.2286433
Filename :
6654286
Link To Document :
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