DocumentCode
791493
Title
Software-controlled cache architecture for energy efficiency
Author
Yang, Chia-Lin ; Tseng, Hung-Wei ; Ho, Chia-Chiang ; WU, JA-LING
Author_Institution
Dept. of Comput. Sci. & Inf. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume
15
Issue
5
fYear
2005
fDate
5/1/2005 12:00:00 AM
Firstpage
634
Lastpage
644
Abstract
Power consumption is an important design issue of current multimedia embedded systems. Data caches consume a significant portion of total processor power for multimedia applications because they are data intensive. In an integrated multimedia system, the cache architecture cannot be tuned specifically for an application. Therefore, a significant amount of cache energy is actually wasted. In this paper, we propose the software-controlled cache architecture that improves the energy efficiency of the shared cache in an integrated multimedia system on an application-specific base. Data types in an application are allocated to different cache regions. On each access, only the allocated cache regions need to be activated. We test the effectiveness of the software-controlled cache of the MPEG-2 software decoder. The results show up to 40% of cache energy reduction on an ARM-like cache architecture without sacrificing performance.
Keywords
cache storage; control engineering computing; embedded systems; multimedia systems; optimisation; power consumption; software engineering; dynamic power dissipation; energy efficiency optimization; multimedia embedded system; software-controlled cache architecture; Application software; Computer architecture; Costs; Embedded system; Energy consumption; Energy dissipation; Energy efficiency; Multimedia systems; Software testing; Space exploration; Dynamic power dissipation; MPEG-2; energy consumption; multimedia applications; software-controlled cache;
fLanguage
English
Journal_Title
Circuits and Systems for Video Technology, IEEE Transactions on
Publisher
ieee
ISSN
1051-8215
Type
jour
DOI
10.1109/TCSVT.2005.846444
Filename
1425528
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