Adaptive Multiple-Resolution CMOS Active Pixel Sensor

Author

Artyomov, Evgeny ; Yadid-Pecht, Orly

Author_Institution

Ben-Gurion Univ. of the Negev, Beer-Sheva

Volume

53

Issue

10

fYear

2006

Firstpage

2178

Lastpage

2186

Abstract

A smart image sensor with adaptive multiple resolution ability is presented. This sensor is based on the quadtree decomposition algorithm, which decomposes an image into square homogeneous regions. After the image is segmented, only the value of the block and its size are stored or transmitted. On-chip implementation can solve the information bottleneck problem by reducing the amount of data for transmission. Good compression results can be achieved for scenes with predominant and homogeneous backgrounds. The algorithm is implemented on chip in a mixed-signal column parallel architecture in 0.35-mum 4M2P n-well TSMC CMOS technology available through MOSIS. Typical power dissipation for the test chip with 32times32 pixels is 70 mW at VDD=3.3 V

Keywords

CMOS image sensors; image segmentation; 0.35 micron; 1024 pixels; 3.3 V; 32 pixels; 70 mW; CMOS active pixel sensor; CMOS imager; adaptive image sensor; image decomposition; image segmentation; mixed-signal column; multiple-resolution image sensor; quadtree decomposition algorithm; smart image sensor; CMOS image sensors; CMOS technology; Image coding; Image resolution; Image segmentation; Image sensors; Intelligent sensors; Layout; Parallel architectures; Power dissipation; Active pixel sensor (APS); CMOS imagers; VLSI; compression; image sensor; multiple resolution; quadtree decomposition (QTD);

fLanguage

English

Journal_Title

Circuits and Systems I: Regular Papers, IEEE Transactions on

Publisher

ieee

ISSN

1549-8328

Type

jour

DOI

10.1109/TCSI.2006.883161

Filename

1710197