Title :
Clock Synchronization Errors in Circuits: Models, Stability and Fault Detection
Author :
Lorand, Cédric ; Bauer, Peter H.
Author_Institution :
Dept. of Electr. Eng., Notre Dame Univ., IN
Abstract :
This paper models and analyzes the effect of multiple sub-systems that are driven by the same clock signal with active clock edges reaching subsystems at different time instants. This type of problem appears in high speed circuits and systems where the clock signal propagation delays differ significantly and the global system properties of the ideally synchronously switching system are changed. Fault detection and identification methods for this type of system are provided, by using a state-space approach to asynchronously switching systems
Keywords :
asynchronous circuits; circuit stability; clocks; fault diagnosis; network analysis; switching circuits; synchronisation; circuit models; circuit stability; clock synchronization errors; fault detection; global system properties; high speed circuits; signal propagation delays; switching systems; Circuit stability; Circuits and systems; Clocks; Control systems; Electrical fault detection; Fault diagnosis; Propagation delay; Switches; Switching systems; Synchronization; Digital circuits; discrete systems; networks; synchronization;
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
DOI :
10.1109/TCSI.2006.882823
