DocumentCode
791995
Title
Warp Processing: Dynamic Translation of Binaries to FPGA Circuits
Author
Vahid, Frank ; Stitt, Greg ; Lysecky, Roman
Author_Institution
Univ. of California, Riverside, CA
Volume
41
Issue
7
fYear
2008
fDate
7/1/2008 12:00:00 AM
Firstpage
40
Lastpage
46
Abstract
Warp processing dynamically and transparently transforms an executing microprocessor´s binary kernels into customized field-programmable gate array (FPGA) circuits, commonly resulting in 2X to 100X speedup over executing on microprocessors. A new architecture and set of dynamic CAD tools demonstrate warp processing´s potential.
Keywords
Circuit synthesis; Clocks; Field programmable gate arrays; Hardware; Kernel; Logic arrays; Logic devices; Microprocessors; Programmable logic arrays; Yarn; FPGA; dynamic synthesis; embedded systems; just-in-time compilation; reconfigurable computing; warp processing;
fLanguage
English
Journal_Title
Computer
Publisher
ieee
ISSN
0018-9162
Type
jour
DOI
10.1109/MC.2008.240
Filename
4563878
Link To Document