Void-induced thermal impedance in power semiconductor modules: some transient temperature effects

Author

Katsis, Dimosthenis C. ; Van Wyk, Jacobus Daniel

Author_Institution

Bradley Dept. of Electr. & Comput. Eng., Virginia Polytech. Inst., Blacksburg, VA, USA

Volume

39

Issue

5

fYear

2003

Firstpage

1239

Lastpage

1246

Abstract

The operation of power semiconductor modules creates thermal stresses that grow voids in the solder die-attach layer. These voids reduce the ability of the die-attach solder layer to conduct heat from the silicon junction to the heat spreader. This results in increased thermal impedance. The effect of accelerated aging on solder bond voiding and on thermal transient behavior is investigated. Commercially packaged TO-247 style MOSFETs are power cycled, imaged, and thermally analyzed to generate a correlation between void percentage and thermal impedance.

Keywords

ageing; packaging; power MOSFET; soldering; temperature measurement; thermal analysis; transient analysis; voids (solid); TO-247 style MOSFET; accelerated aging; heat conduction; heat spreader; power cycling; power semiconductor modules; silicon junction; solder bond voiding; solder die-attach layer; thermal impedance; thermal stresses; thermal transient behavior; transient temperature effects; void-induced thermal impedance; Accelerated aging; Bonding; Image analysis; Impedance; MOSFETs; Packaging; Power generation; Silicon; Temperature; Thermal stresses;

fLanguage

English

Journal_Title

Industry Applications, IEEE Transactions on

Publisher

ieee

ISSN

0093-9994

Type

jour

DOI

10.1109/TIA.2003.816527

Filename

1233581