Title :
An air spacer technology for improving short-channel immunity of MOSFETs with raised source/drain and high-κ gate dielectric
Author :
Yin, Chunshan ; Chan, Philip C.H. ; Chan, Mansun
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China
fDate :
5/1/2005 12:00:00 AM
Abstract :
An air-spacer technology with raised source/drain (S/D) for ultrathin-body (UTB) silicon-on-insulator MOSFETs is developed. The results show that the poly raised S/D can effectively reduce the series resistance and the air spacer can effectively reduce the fringing capacitance. The air spacer is particularly useful when combined with high-κ gate dielectric. The improved device characteristics are demonstrated experimentally and by extensive two-dimensional device simulation.
Keywords :
MOSFET; circuit simulation; dielectric materials; silicon-on-insulator; MOSFET; air spacer technology; device simulation; fringing capacitance; gate insulator; high-k gate dielectric; improving short-channel immunity; raised source/drain; series resistance; ultrathin-body silicon-on-insulator; Capacitors; Dielectrics; Electrodes; Etching; Immune system; MOSFETs; Parasitic capacitance; Scanning electron microscopy; Silicon on insulator technology; Space technology; Air spacer; gate insulator; high-; raised source/drain (S/D); silicon-on-insulator (SOI); ultrathin-body (UTB);
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2005.846584
