Two-phase boosted voltage generator for low-voltage DRAMs

Author

Cho, Seong-Ik ; Lee, Jung-Hwan ; Park, Hong-June ; Lim, Gyu-Ho ; Kim, Young-Hee

Author_Institution

Hynix Semicond. Inc., Icheon, South Korea

Volume

38

Issue

10

fYear

2003

Firstpage

1726

Lastpage

1729

Abstract

A two-phase boosted voltage (V_PP) generator circuit was proposed for use in gigabit DRAMs. It reduced the maximum gate-oxide voltage of pass transistor and the lower limit of supply voltage to V_PP and V_TN, respectively, while those for the conventional charge-pump circuit are V_PP+V_DD and 1.5 V_TN respectively. Also, the pumping current was increased in the new circuit. The newly proposed two-phase V_PP charge-pump circuit worked successfully at V_DD down to 0.8 V by eliminating the threshold voltage loss of the control pulse generator and was tested successfully in a 0.16-μm test chip using triple-well CMOS technology.

Keywords

CMOS memory circuits; DRAM chips; bootstrap circuits; circuit simulation; pulse generators; 0.16 micron; 0.8 V; bootstrapping; control pulse generator; gigabit DRAMs; low-voltage DRAMs; pass transistor maximum gate-oxide voltage; pumping current; supply voltage lower limit; threshold voltage loss elimination; triple-well CMOS technology; two-phase V_PP charge-pump circuit; two-phase boosted voltage generator; CMOS technology; Charge pumps; Circuit testing; Low voltage; MOSFETs; Pulse generation; Random access memory; Ring oscillators; Threshold voltage; Voltage control;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2003.817592

Filename

1233780