• DocumentCode
    794016
  • Title

    Design and evaluation of the rollback chip: special purpose hardware for Time Warp

  • Author

    Fujimoto, Richard M. ; Tsai, Jya-Jang ; Gopalakrishnan, Ganesh C.

  • Author_Institution
    Coll. of Comput, Georgia Inst. of Technol., Atlanta, GA, USA
  • Volume
    41
  • Issue
    1
  • fYear
    1992
  • fDate
    1/1/1992 12:00:00 AM
  • Firstpage
    68
  • Lastpage
    82
  • Abstract
    Existing approaches to implement state saving are not appropriate for large Time Warp programs. The authors propose a component called the rollback chip (RBC) that efficiently implements state saving. Such a component could be used in a programmable, special purpose parallel discrete event simulation engine based on Time Warp. The algorithms implemented by the rollback chip are described, as well as mechanisms that allow efficient implementation. Results of simulation studies are presented that show that the rollback chip can virtually eliminate the state saving and rollback overheads that plague current software implementations of Time Warp
  • Keywords
    discrete event simulation; microprocessor chips; parallel architectures; Time Warp; parallel discrete event simulation engine; rollback chip; software implementations; special purpose hardware; state saving; Clocks; Computational modeling; Computer architecture; Computer simulation; Concurrent computing; Discrete event simulation; Hardware; Military computing; Synchronization; Time warp simulation;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.123382
  • Filename
    123382