• DocumentCode
    794093
  • Title

    A comprehensive signature analysis scheme for oscillation-test

  • Author

    Roh, Jeongjin ; Abraham, Jacob A.

  • Author_Institution
    Dept. of Electr. Eng., Hanyang Univ., Ansan, South Korea
  • Volume
    22
  • Issue
    10
  • fYear
    2003
  • Firstpage
    1409
  • Lastpage
    1423
  • Abstract
    A low-cost and comprehensive built-in self-test (BIST) methodology for analog and mixed-signal circuits is described. We implement a time-division multiplexing (TDM) comparator to analyze the response of a circuit under test with minimum hardware overhead. The TDM comparator scheme is an effective signature analyzer for on-chip analog response compaction and pass/fail decision. We apply this scheme to an oscillation-test environment and implement a low-cost and comprehensive vectorless BIST methodology for high fault and yield coverage. Our scheme allows a tolerance in the output response, a feature necessary for analog circuits. Both oscillation frequency and oscillation amplitude are measured indirectly to increase the fault coverage. We provide a theoretical analysis of the oscillation that explains why the amplitude measurement is essential. Simulation results demonstrate that the proposed scheme can significantly reduce test time of the oscillation-test while achieving higher fault coverage.
  • Keywords
    built-in self test; comparators (circuits); fault diagnosis; integrated circuit yield; mixed analogue-digital integrated circuits; BIST; fault coverage; mixed-signal circuits; on-chip analog response compaction; oscillation amplitude; oscillation frequency; oscillation-test; output response; pass/fail decision; signature analysis scheme; test time; time-division multiplexing comparator; yield coverage; Analog circuits; Built-in self-test; Circuit faults; Circuit simulation; Circuit testing; Compaction; Failure analysis; Frequency measurement; Hardware; Time division multiplexing;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2003.818133
  • Filename
    1233826