Title :
A real-time adaptive lattice predictor using a digital signal processor chip
Author :
Kim, Sung-Hwan ; Hong, Ki-Ryong ; Young-Hwan Choi ; Hong, Woan-Hue
Author_Institution :
Dept. of Electron. Eng., Seoul City Univ., South Korea
fDate :
10/1/1989 12:00:00 AM
Abstract :
A real-time adaptive lattice predictor was implemented using a digital signal processing chip. The implementation comprises input-output units, a central processing and control unit, and supporting software. The performance of the hardware was verified by comparing an input signal and the one-step prediction signal calculated by the predictor. The maximum operating frequency for the four-stage lattice structure was 13.5 kHz
Keywords :
adaptive systems; computer architecture; digital signal processing chips; real-time systems; telecommunications computing; 13.5 kHz; digital signal processor chip; four-stage lattice structure; one-step prediction signal; real-time adaptive lattice predictor; Centralized control; Convergence; Digital signal processing chips; Digital signal processors; Hardware; Lattices; Parallel processing; Process control; Radar signal processing; Signal processing algorithms;
Journal_Title :
Instrumentation and Measurement, IEEE Transactions on
