Title :
Statistical resistance to detection [digital circuits testing]
Author :
Boneh, A. ; Savir, J.
Author_Institution :
IBM Israel Sci. Center, Haifa, Israel
fDate :
1/1/1992 12:00:00 AM
Abstract :
Discusses the problem of estimating the sum of the detection probabilities of the yet unobserved faults during a random pattern test of a given digital circuit. The authors describe a statistical method for this purpose. The method requires keeping track of each fault until it is detected for the second time, and thus the simulation cost is about twice the cost of a similar simulation which abandons faults after their first detect. The benefits of having an estimate of the sum of these detection probabilities are twofold: (1) it provides a good stopping rule whenever 100% fault coverage is infeasible (which is often the case), and (2) it provides an estimate of the required effort to detect the next fault. The results of tests performed on some circuits are presented
Keywords :
automatic testing; digital circuits; fault location; integrated circuit testing; logic testing; detection probabilities; digital circuit; digital circuits testing; fault coverage; random pattern test; simulation cost; statistical method; Circuit faults; Circuit simulation; Circuit testing; Costs; Digital circuits; Electrical fault detection; Fault detection; Performance evaluation; Probability; Statistical analysis;
Journal_Title :
Computers, IEEE Transactions on