DocumentCode :
795652
Title :
Scaling, subthreshold, and leakage current matching characteristics in high-temperature (25°C-250°C) VLSI CMOS devices
Author :
Shoucair, F.S.
Author_Institution :
Dept. of Electr. Eng., Brown Univ., Providence, RI, USA
Volume :
12
Issue :
4
fYear :
1989
fDate :
12/1/1989 12:00:00 AM
Firstpage :
780
Lastpage :
788
Abstract :
The effects of CMOS technology scaling on the high-temperature (25-250°C) characteristics of the threshold voltage, the channel mobility, and drain and source-to-body leakage currents are presented. Three versions (6-, 4-, and 2-μm minimum feature length) of a standard CMOS process optimized for digital circuit applications, and a 4-μm version of the same process optimized for analog circuit applications are compared with respect to the aforementioned parameters. The temperature-induced trends are qualitatively similar for the four technologies. A dramatic increase in the subthreshold parameter is observed above 150°C in the analog process, which is consistent with the previously reported onset of diffusion-leakage currents near this temperature. Detailed leakage-current matching measurements are shown to lead to severe resolution-speed tradeoffs in the design of sampled data circuits operated at elevated temperatures. A simple capacitor switched by a CMOS transmission gate is used to illustrate the latter considerations. Silicon CMOS technologies built on low-resistance epitaxial layers, combined with gold-based metallizations, are found to be the most promising among existing technologies for applications up to 250°C. Specific needs for further research on the severe-environment behavior of state-of-the-art and emerging technologies are discussed
Keywords :
CMOS integrated circuits; VLSI; analogue-digital conversion; digital integrated circuits; elemental semiconductors; environmental testing; gold; integrated circuit technology; leakage currents; linear integrated circuits; metallisation; reliability; silicon; 2 micron; 25 to 250 degC; 4 micron; 6 micron; Au based metallizations; CMOS technology scaling; CMOS transmission gate; Si devices; VLSI CMOS devices; analog circuit applications; channel mobility; data circuit design; diffusion-leakage currents; digital circuit applications; drain leakage currents; elevated temperatures; feature length; high temperature electronics; leakage-current matching; low-resistance epitaxial layers; resolution-speed tradeoffs; sampled data circuits; severe-environment behavior; simple capacitor; source-to-body leakage currents; standard CMOS process; subthreshold characteristics; subthreshold parameter; temperature-induced trends; threshold voltage; Analog circuits; CMOS process; CMOS technology; Capacitors; Digital circuits; Leakage current; Sampled data circuits; Silicon; Temperature; Threshold voltage;
fLanguage :
English
Journal_Title :
Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
Publisher :
ieee
ISSN :
0148-6411
Type :
jour
DOI :
10.1109/33.49047
Filename :
49047
Link To Document :
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