DocumentCode :
795892
Title :
Accurate sample-and-hold circuit model
Author :
Xu, G. ; Yuan, J.
Author_Institution :
Dept. of Electrosci., Lund Univ., Sweden
Volume :
41
Issue :
9
fYear :
2005
fDate :
4/28/2005 12:00:00 AM
Firstpage :
520
Lastpage :
522
Abstract :
An accurate circuit model is presented for the general sample-and-hold circuit with a finite sampling duration. The applications of the model, such as to design a direct down-conversion sampler (RF sampler) and to calculate the thermal noise and output SNR of the general sample-and-hold circuit, are discussed. The results provide a theoretical basis for understanding and designing a sample-and-hold circuit.
Keywords :
circuit noise; network synthesis; sample and hold circuits; RF sampler; direct down-conversion sampler; finite sampling duration; sample-and-hold circuit model; thermal noise;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:20050088
Filename :
1426559
Link To Document :
بازگشت