Title :
A 3/5 V compatible I/O buffer
Author :
Pelgrom, Marcel J M ; Dijkmans, E. Carel
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
fDate :
7/1/1995 12:00:00 AM
Abstract :
The design of a digital input/output buffer is described for operation in 3.3-V IC´s with 5-V input signals. The design has been processed in 0.8- and 0.6-μm CMOS processes. A comparison of results is presented
Keywords :
CMOS digital integrated circuits; buffer circuits; driver circuits; power supply circuits; 0.6 micron; 0.8 micron; 3.3 V; 5 V; CMOS process; IC power reduction; bidirectional bus driver; digital input/output buffer; power supply voltages; Bonding; CMOS process; Digital integrated circuits; Diodes; Driver circuits; Power supplies; Signal design; Stress; Switches; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
