Analogue VLSI morphological image processing circuit

An analogue VLSI circuit that performs morphological image processing operations on the focal plane is presented. The circuit has been fabricated using a standard digital CMOS process. We exploit the parallelism of morphological image processing operations by using the massively parallel architecture of analogue VLSI arrays, achieving both high-speed and low-power computation. The analogue circuit presented computes the grey-scale morphological operation of dilation. This system also allows for programmability of the structuring element used in the dilation operation