Title :
Ferroelectric Artificial Synapses for Recognition of a Multishaded Image
Author :
Kaneko, Yuya ; Nishitani, Yu. ; Ueda, Makoto
Author_Institution :
Adv. Technol. Res. Labs., Panasonic Corp., Kyoto, Japan
Abstract :
We demonstrate, for the first time, the on-chip pattern recognition of a multishaded grayscale image in a neural network circuit with multiple neurons. This pattern recognition is based on a spiking neural network model that uses multiple three-terminal ferroelectric memristors (3T-FeMEMs) as synapses. The synapse chip of the neural network is formed by stacking CMOS circuits and 3T-FeMEMs. The conductance of the 3T-FeMEM is gradually changed in the linear range by varying the amplitude of the applied voltage pulse. Using the analog and nonvolatile conductance change of the 3T-FeMEM as synaptic weight, the matrix patterns are learned after the spike timing-dependent plasticity learning rule. Even when an incomplete multishaded pattern is input to the neural network circuit, it automatically completes and recalls a previously learned pattern.
Keywords :
CMOS integrated circuits; ferroelectric devices; image recognition; memristors; neural chips; 3T-FeMEM conductance; analog conductance change; applied voltage pulse amplitude; ferroelectric artificial synapses; matrix patterns; multiple neurons; multiple three-terminal ferroelectric memristors; multishaded grayscale image recognition; neural network circuit; nonvolatile conductance change; on-chip pattern recognition; spike timing-dependent plasticity learning rule; spiking neural network model; stacking CMOS circuits; synaptic weight; Biological neural networks; Electrodes; Logic gates; Neurons; Pattern recognition; Timing; Artificial neural network; ferroelectric devices; memristor; neural network hardware; nonvolatile memory; pattern recognition; pattern recognition.;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2014.2331707