DocumentCode :
797736
Title :
Improving Ariadne´s Bundle by Following Multiple Threads in Abstraction Refinement
Author :
Wang, Chao ; Li, Bing ; Jin, HoonSang ; Hachtel, Gary D. ; Somenzi, Fabio
Author_Institution :
NEC Labs. America, Princeton, NJ
Volume :
25
Issue :
11
fYear :
2006
Firstpage :
2297
Lastpage :
2316
Abstract :
The authors propose a scalable abstraction-refinement method for model checking invariant properties on large sequential circuits, which is based on fine-grain abstraction and simultaneous analysis of all abstract counterexamples of the shortest length. Abstraction efficiency is introduced to measure for a given abstraction-refinement algorithm how much of the concrete model is required to make the decision. The fully automatic techniques presented in this paper can efficiently reach or come near to the maximal abstraction efficiency. First, a fine-grain abstraction approach is given to keep the abstraction granularity small by breaking down large combinational logic cones with Boolean network variables (BNVs) and then treating both state variables and BNVs as atoms in abstraction. Second, a refinement algorithm is proposed based on an improved Ariadne\´s bundle In the legend of Theseus, Ariadne\´s bundle contained one ball of thread to help Theseus navigate the labyrinth. In this paper, we work with multiple threads-hence, the "improved." of synchronous onion rings on the abstract model, through which the transitions contain all shortest abstract counterexamples. The synchronous onion rings are exploited in two distinct ways to provide global guidance to the abstraction refinement process. The scalability of our algorithm is ensured in the sense that all the analysis and computation required in our refinement algorithm are conducted on the abstract model. Finally, we derive sequential don\´t cares from the invisible variables and use them to constrain the behavior of the abstract model. We conducted experimental comparisons of our new method with various existing techniques. The results show that our method outperforms other counterexample-guided methods in terms of both run time and abstraction efficiency
Keywords :
Boolean functions; binary decision diagrams; combinational circuits; formal verification; sequential circuits; Boolean network variables; abstraction refinement; binary decision diagram; combinational logic cones; counterexample-guided methods; fine-grain abstraction; formal verification; improving Ariadne bundle; large sequential circuits; maximal abstraction efficiency; multiple threads; synchronous onion rings; Algorithm design and analysis; Boolean functions; Chaos; Concrete; Data structures; Explosives; Hardware design languages; Scalability; Sequential circuits; Yarn; Abstraction refinement; binary decision diagram (BDD); formal verification; model checking; satisfiability (SAT);
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2006.873897
Filename :
1715417
Link To Document :
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