• DocumentCode
    797806
  • Title

    Shared-memory architecture to implement a high-connectivity processing node

  • Author

    Ancona, F. ; Anguita, D. ; Rovetta, S. ; Zunino, R.

  • Author_Institution
    Genoa Univ., Italy
  • Volume
    31
  • Issue
    22
  • fYear
    1995
  • fDate
    10/26/1995 12:00:00 AM
  • Firstpage
    1903
  • Lastpage
    1904
  • Abstract
    The Letter describes the implementation of a high-connectivity processing node by means of an embedded shared dual-port memory. The memory is accessed directly by two transputers in order to realise a virtual processor with a connectivity and a computing power that are twice those of a single transputer
  • Keywords
    memory architecture; shared memory systems; transputer systems; computing power; embedded dual-port memory; high-connectivity processing node; shared-memory architecture; transputers; virtual processor;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19951300
  • Filename
    490648
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=797806