• DocumentCode
    798560
  • Title

    Application of an Ordinal Optimization Algorithm to the Wafer Testing Process

  • Author

    Lin, Shin-Yeu ; Horng, Shih-Cheng

  • Author_Institution
    Dept. of Electr. & Control Eng., Nat. Chiao Tung Univ., Hsinchu
  • Volume
    36
  • Issue
    6
  • fYear
    2006
  • Firstpage
    1229
  • Lastpage
    1234
  • Abstract
    In this correspondence, we have formulated a stochastic optimization problem to find the optimal threshold values to reduce the overkills of dies under a tolerable retest level in wafer testing process. The problem is a hard optimization problem with a huge solution space. We propose an ordinal optimization theory-based two-level algorithm to solve for a vector of good enough threshold values and compare with those obtained by others using a set of 521 real test wafers. The test results confirm the feature of controlling the retest level in our formulation, and the pairs of overkills and retests resulted from our approach are almost Pareto optimal. In addition, our approach spends only 6.05 min in total in a Pentium IV personal computer to obtain the good enough threshold values
  • Keywords
    computational complexity; integrated circuit manufacture; optimisation; semiconductor device testing; genetic algorithm; optimal threshold values; ordinal optimization; stochastic optimization problem; wafer probing; wafer testing process; Assembly; Fabrication; Microcomputers; Neural networks; Optimal control; Packaging machines; Solids; Stochastic processes; Testing; Throughput; Genetic algorithm (GA); neural network; ordinal optimization (OO); overkill; retest; stochastic optimization; wafer probing;
  • fLanguage
    English
  • Journal_Title
    Systems, Man and Cybernetics, Part A: Systems and Humans, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1083-4427
  • Type

    jour

  • DOI
    10.1109/TSMCA.2006.878965
  • Filename
    1715492