• DocumentCode
    799890
  • Title

    The Multivalley Effective Conduction Band-Edge Method for Monte Carlo Simulation of Nanoscale Structures

  • Author

    Sampedro-Matarín, Carlos ; Gámiz, Francisco ; Godoy, Andrés ; Ruiz, Francisco J García

  • Author_Institution
    Departamento de Electronica y Tecnologia de Computadores, Granada Univ.
  • Volume
    53
  • Issue
    11
  • fYear
    2006
  • Firstpage
    2703
  • Lastpage
    2710
  • Abstract
    The trend toward continuous integration of the nanometer scale and the rise of nonconventional device concepts such as multigate transistors present important challenges for the semiconductor community. Simulation tools have to be adapted to this new scenario where classical approaches are not sufficiently accurate, and quantum effects have to be taken into account. This paper proposes a method of including quantum corrections in Monte Carlo (MC) simulations without solving the Schroumldinger equation. The approach, based on the effective conduction band-edge (ECBE) method, considers the effects of an arbitrary effective mass tensor, describing valley characteristics and confinement directions while avoiding the use of effective mass as a fitting parameter. The performance of the multivalley ECBE method is tested using an ensemble MC simulator to study benchmark devices for next International Technology Roadmap for Semiconductors technological nodes, a 25-nm channel length bulk-MOSFET and a double-gate silicon-on-insulator MOSFET in both steady-state and transient situations
  • Keywords
    MOSFET; Monte Carlo methods; nanoelectronics; semiconductor device models; silicon-on-insulator; 25 nm; MOSFET; Monte Carlo simulation; arbitrary effective mass tensor; confinement directions; effective conduction band-edge method; multigate transistors; nanoscale structures; quantum corrections; quantum effects; semiconductor device modeling; silicon-on-insulator technology; valley characteristics; Benchmark testing; Effective mass; Equations; MOSFETs; Monte Carlo methods; Nanoscale devices; Nanostructures; Semiconductor device testing; Silicon on insulator technology; Tensile stress; MOSFETs; Monte Carlo (MC) methods; quantum well; semiconductor device modeling; silicon-on-insulator (SOI) technology;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2006.882782
  • Filename
    1715612