DocumentCode :
800768
Title :
Analog VLSI neural network with digital perturbative learning
Author :
Koosh, Vincent F. ; Goodman, Rodney M.
Author_Institution :
California Inst. of Technol., Pasadena, CA, USA
Volume :
49
Issue :
5
fYear :
2002
fDate :
5/1/2002 12:00:00 AM
Firstpage :
359
Lastpage :
368
Abstract :
Two feed-forward neural-network hardware implementations are presented. The first uses analog synapses and neurons with a digital serial weight bus. The chip is trained in loop with the computer performing control and weight updates. By training with the chip in the loop, it is possible to learn around circuit offsets. The second neural network also uses a computer for the global control operations, but all of the local operations are performed on chip. The weights are implemented digitally, and counters are used to adjust them. A parallel perturbative weight update algorithm is used. The chip uses multiple, locally generated, pseudorandom bit streams to perturb all of the weights in parallel. If the perturbation causes the error function to decrease, the weight change is kept; otherwise, it is discarded. Test results from a very large scale integration (VLSI) prototype are shown of both networks successfully learning digital functions such as AND and XOR.
Keywords :
VLSI; analogue integrated circuits; feedforward neural nets; integrated circuit design; learning (artificial intelligence); analogue VLSI; chip-in-loop training algorithm; digital perturbative learning; feed-forward neural-network; neural chips; neuromorphic perturbation techniques; Computer networks; Counting circuits; Feedforward systems; Hardware; Network-on-a-chip; Neural networks; Neurons; Testing; Very large scale integration; Weight control;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher :
ieee
ISSN :
1057-7130
Type :
jour
DOI :
10.1109/TCSII.2002.802282
Filename :
1025156
Link To Document :
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