DocumentCode
80151
Title
Ternary R2R DAC design for improved energy efficiency
Author
Guerber, Jon ; Venkatram, H. ; Gande, Manideep ; Moon, Un-Ku
Author_Institution
Electr. Eng. & Comput. Sci. Dept., Oregon State Univ., Corvallis, OR, USA
Volume
49
Issue
5
fYear
2013
fDate
February 28 2013
Firstpage
329
Lastpage
330
Abstract
An R2R DAC using three digital input levels rather than two is proposed as well as a modified two-level structure that emulates the three-level DAC´s benefits. This three-level structure provides power reductions of 79% and linearity improvements due to matching of a factor of 2 over the two-level case. Ideal implementation is also described in terms of the logic needed to code the DAC and the requirements of the additional third reference level.
Keywords
digital-analogue conversion; energy conservation; energy efficiency; linearity improvements; power reductions; ternary R2R DAC design; third reference level; three digital input levels; three-level DAC benefits; three-level structure; two-level structure;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el.2012.4224
Filename
6473939
Link To Document