Title :
A 12.5-Gb/s On-Chip Oscilloscope to Measure Eye Diagrams and Jitter Histograms of High-Speed Signals
Author :
Dehlaghi, Behzad ; Magierowski, Sebastian ; Belostotski, Leonid
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada
Abstract :
This paper presents a 12.5-Gb/s on-chip oscilloscope (OCO) circuit to measure eye diagrams and jitter histograms of high-speed digital signals. The proposed circuit adopts a novel architecture to capture both single-ended and differential signals. In addition, it is capable of measuring the eye openings and jitter of the input signals without the need to construct the whole eye diagram which makes it a suitable candidate for eye-opening monitor circuits. An asynchronous sampling technique and an efficient algorithm are employed in this research to decrease the area of the OCO as well as its processing time. The proposed circuit is fabricated in a 65-nm CMOS technology and the measurement results show sub-picosecond resolution when the input signals consist of a 10-GHz clock signal and a 12.5-Gb/s pseudorandom binary sequence. The OCO circuit has a power consumption of 1.9 mW, and its core area is 40 × 60 μm.
Keywords :
CMOS integrated circuits; binary sequences; built-in self test; clocks; high-speed integrated circuits; jitter; oscilloscopes; CMOS; asynchronous sampling technique; bit rate 12.5 Gbit/s; clock signal; differential signals; eye diagrams; frequency 10 GHz; high-speed digital signals; jitter histograms; on-chip oscilloscope; power 1.9 mW; power consumption; pseudorandom binary sequence; single-ended signals; size 65 nm; Asynchronous sampling; built-in self test (BIST); eye diagram; eye-opening monitor (EOM); jitter measurement; on-chip oscilloscope; on-chip oscilloscope.;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2013.2265895